1. Technical Field
The present invention relates to a semiconductor device manufacturing method.
2. Related Art
In order to manufacture DMOS (Double Diffused Metal Oxide Semiconductor) transistors or bipolar transistors, a first impurity region that is connected to a buried diffusion layer and a second impurity region that is connected to the buried diffusion layer are formed. For example, a bottom of a well (first impurity region) in which DMOS transistors or bipolar transistors are formed is limited by a buried diffusion layer, and an outer circumference of the well is limited by plugs (second impurity region). In this structure, reduction of an element area is a problem to be solved.
JP-A-10-284731 (FIGS. 7 to 10 and paragraphs 0021 to 0023) describes a situation in which, in order to form a drain region, impurity ions are implanted and diffused to a buried region using thermal drive-in technology, and then the drain region expands along a face of a substrate by a thermal process performed in a field oxide forming step, or the like.
As shown in JP-A-10-284731 (FIGS. 7 to 10 and paragraphs 0021 to 0023), if the drain region expands in the direction along the face of the substrate by a thermal process after impurity ions in the drain region are diffused to the buried region, an element area is enlarged by the amount of this enlargement.